PMAM 2014

The 2014 International Workshop on Programming Models and Applications for Multicores and Manycores

to be held in conjunction with
PPoPP 2014

February 15-19, 2014
Orlando, Florida


Workshop Photos


Photo of the workshop at 6pm:


Workshop Program

A pdf version of the workshop program is available here. You can find the workshop proceedings here.

Opening Remarks (8:45am - 9:00am)

Pavan Balaji, Minyi Guo, and Zhiyi Huang


Keynote (9:00am - 10:00am): Program Interaction in Shared Cache: A Theory and Applications (slides)

Chen Ding, Professor, University of Rochester

Abstract

On modern multicore systems, the interaction between co-run programs largely depends on cache sharing, and cache sharing depends on the locality, i.e. the active data usage, in co-run programs. This talk introduces a newly developed locality theory based on a concept called the footprint. The theory shows the composability of footprint and the conversion between footprint and other locality metrics. It enables accurate characterization and analysis of the dynamics of cache sharing.

Biography

Chen Ding received Ph.D. from Rice University, M.S. from Michigan Tech, and B.S. from Beijing University before joining Rochester in 2000. His research received the young investigator awards from NSF and DOE. He co-founded the ACM SIGPLAN Workshop on Memory System Performance and Correctness (MSPC) and was a visiting researcher at Microsoft Research and a visiting associate professor at MIT. He is an external faculty fellow at IBM Center for Advanced Studies.


Morning Break (10:00am - 10:30am)


Session 1 (10:30am - 12:00pm): Runtime support

Session Chair: Bernd Burgstaller

Work Stealing Strategies For Multi-Core Parallel Branch-and-Bound Algorithm Using Factorial Number System (slides)
Rudi Leroy, Mohand Mezmaz, Nouredine Melab and Daniel Tuytten

Palirria: Accurate On-line Parallelism Estimation for Adaptive Work-Stealing (slides)
Georgios Varisteas and Mats Brorsson

DWS: Demand-aware Work-Stealing in Multi-programmed Multi-core Architectures (slides)
Quan Chen, Long Zheng and Minyi Guo

Compiling Fresh Breeze Codelets
Jack B. Dennis


Lunch Break (12:00pm - 1:30pm)


Session 2 (1:30pm - 3:00pm): Programming languages and models

Session Chair: Chen Ding

Programming a Multicore Architecture without Coherency and Atomic Operations (slides)
Jochem H. Rutgers, Marco J.G. Bekooij and Gerard J.M. Smit

Vectorizing Unstructured Mesh Computations for Many-core Architectures (slides)
I. Z. Reguly, E. László, G. R. Mudalige and M. B. Giles

A Framework for Multiplatform HPC Applications
Masayuki Ioki and Shigeru Chiba


Afternoon Break (3:00pm - 3:30pm)


Session 3 (3:30pm - 5:00pm): Algorithms and Applications

Session Chair: TBD

A Novel CPU-GPU Cooperative Implementation of A Parallel Two-List Algorithm for the Subset-Sum Problem (slides)
Lanjun Wan, Kenli Li, Jing Liu and Keqin Li

Dynamic Partitioning-based JPEG Decompression on Heterogeneous Multicore Architectures (slides)
Wasuwee Sodsong, Jingun Hong, Seongwook Chung, Yeongkyu Lim, Shin-Dug Kim and Bernd Burgstaller

Fast Longest Common Subsequence with General Integer Scoring Support on GPUs (slides)
Adnan Ozsoy, Arun Chauhan and Martin Swany

Efficient Parallel Implementations of Multiple Sequence Alignment using BSP/CGM Model (slides)
Jucele F. A. Vasconcellos, Christiane Nishibe, Nalvo F. Almeida and Edson N. Cáceres


Session 4 (5:00pm - 6:00pm): Programming Tools

Session Chair: Xiaoyi Lu

Autotuning Wavefront Applications for Multicore Multi-GPU Hybrid Architectures (slides)
Siddharth Mohanty and Murray Cole

Reduction Operations in Parallel Loops for GPGPUs (slides)
Rengan Xu, Xiaonan Tian, Yonghong Yan, Sunita Chandrasekaran, and Barbara Chapman

Self-Configuration and Self-Optimization Autonomic Skeletons using Events (slides)
Gustavo Pabón and Ludovic Henrio

Closing Remarks (6:00pm - 6:15pm)

Pavan Balaji, Minyi Guo, and Zhiyi Huang


Introduction

Rapid advancements in multicore and manycore chips have been a revolution within chip manufacturing, almost eradicating single-core processors. From high-end servers to mobile phones, multicore and manycore chips are steadily entering every single aspect of information technology. However, programming multicore and manycore architectures remains challenging today. To fully utilize these chips, parallel programming models that allow sequential programs and programs utilizing limited parallelism to transition to architectures with massive parallelism, while maintaining good performance and productive development, are urgently needed.

This workshop is dedicated primarily to gather researchers and practitioners addressing the main challenges and share experiences in the emerging multicore and manycore software engineering and distributed programming paradigm. This workshop aims to provide a discussion forum for people interested in programming environments, models, tools and applications specifically designed for parallel multicore and manycore hardware environments.

List of accepted papers

Dynamic Partitioning-based JPEG Decompression on Heterogeneous Multicore Architectures
Wasuwee Sodsong, Jingun Hong, Seongwook Chung, Shin-Dug Kim and Bernd Burgstaller

Vectorizing Unstructured Mesh Computations for Many-core Architectures
Istvan Reguly, Endre Laszlo, Gihan Mudalige and Mike Giles

Palirria: Accurate On-line Parallelism Estimation for Adaptive Work-Stealing
Georgios Varisteas and Mats Brorsson

A Novel CPU-GPU Cooperative Implementation of A Parallel Two-List Algorithm for the Subset-Sum Problem
Lanjun Wan, Kenli Li, Jing Liu and Keqin Li

Autotuning Wavefront Applications for Multicore Multi-GPU Hybrid Architectures
Siddharth Mohanty and Murray Cole

Fast Longest Common Subsequence with General Integer Scoring Support on GPUs
Adnan Ozsoy, Arun Chauhan and Martin Swany

Compiling Fresh Breeze Codelets
Jack Dennis

Reduction Operations in Parallel Loops for GPGPUs
Rengan Xu, Xiaonan Tian, Yonghong Yan, Sunita Chandrasekaran and Barbara Chapman

A framework for multiplatform HPC applications
Masayuki Ioki and Shigeru Chiba

Work Stealing Strategies For Multi-Core Parallel Branch-and-Bound Algorithm Using Factorial Number System
Rudi Leroy, Mohand Mezmaz, Nouredine Melab and Daniel Tuyttens

Reachability Analysis of Cost-Reward Timed Automata for Energy Efficiency Scheduling
Wang Wei

DWS: Demand-aware Work-Stealing in Multi-programmed Multi-core Architectures
Quan Chen and Minyi Guo

Programming a Multicore Architecture without Coherency and Atomic Operations
Jochem H. Rutgers, Marco J.G. Bekooij and Gerard J.M. Smit

Efficient Parallel Implementations of Multiple Sequence Alignment using BSP/CGM Model
Jucele Vasconcellos, Christiane Nishibe, Nalvo Almeida and Edson Cáceres

Self-Configuration and Self-Optimization Autonomic Skeletons using Events
Gustavo Pabon and Ludovic Henrio

Important Dates

Paper submission deadline : November 3, 2013 extended to November 17, 2013
Notification of acceptance : January 1, 2014
Camera-ready papers due : January 15, 2014

Objectives, scope and topics of the workshop

The program committee cordially invites any novel research ideas in (but not limited to) the following topics:

Names and contacts of key organizers

Organization co-chairs

Pavan Balaji
Argonne National Laboratory, USA
balaji at mcs dot anl dot gov

Minyi Guo
Shanghai Jiaotong University, China
guo-my at cs dot sjtu dot edu dot cn

Zhiyi Huang
University of Otago, New Zealand
hzy at cs dot otago dot ac dot nz

Programme Committee (to be extended)

Manuscript submission

Papers reporting original and unpublished research results and experience are solicited. All paper submissions will be handled electronically via EasyChair.

Papers must not exceed 10 pages in standard ACM two-column conference format (preprint mode, with page number and the 9pt template). Templates for ACM format are available for Microsoft Word, and LaTeX at here.

Authors must register and submit their paper through the online submission system. If you have problems accessing the system, e-mail your submission to:
pmam2014 at cs dot otago dot ac dot nz

Proceedings

All accepted papers will be published in the PMAM 2014 proceedings by the ACM Digital Library, and will be included in the Elsevier databases Scopus and Compendex.

Selected best papers of PMAM will be considered for publication in a special issue of the Wiley's journal of Concurrency and Computation: Practice and Experience (CC-PE).

Registration

Information about registration at PPoPP 2014 main website.

Contact Us

For further information regarding the workshop and paper submission, please send your request or enquiry to:
pmam2014 at cs dot otago dot ac dot nz